1. Field of the Invention
The present invention relates to a semiconductor integrated circuit having a current mirror circuit.
2. Background Art
Current mirror circuits are conventional circuits that generate the reproductions of reference currents and have been widely used for biases and so on in analog circuits.
A reference current is copied by applying, to the gate of a second n-type MOS transistor, a gate potential generated at the application of the reference current of a first n-type MOS transistor that is diode-connected. When voltages applied between the gates and sources are equal to each other and these MOS transistors operate in a saturation region, currents applied to these MOS transistors are equalized (in this case, a channel length modulation effect is ignored).
However, for example, when a resistive component is present between the source and ground of the second n-type MOS transistor, a current is applied to the node of the source and the ground and thus voltages between the gates and sources of the MOS transistors may be different from each other.
Also when a ground line has a parasitic resistance component and so on, for example, when the two MOS transistors are separated from each other on the layout, voltages between the gates and sources of the MOS transistors may be different from each other.
When voltages between the gates and sources of these MOS transistors are different from each other, the MOS transistors do not operate based on the same operating point, so that the reference current cannot be correctly mirrored.
The mismatch of the current mirror can be avoided by careful consideration of the layout, for example, by closely interconnecting the MOS transistors that serve as a source and a destination of mirroring.
In some cases, a current mirror circuit may be used for, for example, the bias of a common-source amplifier. For example, in the case of degeneration using a resistor, a resistor causing the same voltage drop as the transistor serving as the destination is inserted into the transistor serving as the source of mirroring, so that voltages between the gates and sources of the two MOS transistors are kept equal.
However, in the case of inductive degeneration used for a low noise amplifier (LNA) with an inductance composed of a metal wire, the compensation is difficult. For example, the source of the MOS transistor serving as the source of mirroring has to have a resistance equivalent to a multiple of the mirror ratio of a resistance between the source and the ground of an amplifier. The inductance using a metal wire generally has a spiral configuration that is several tens of μm to several hundreds of μm in diameter. The metal wire has a parasitic resistor (a resistive component of several ohms to several tens of ohms).
In other words, when the resistor inserted in the source of mirroring is obtained by the same metal wire, an extremely large region is necessary only for the wire and is not suitable for practical use.
In another method, a resistance equivalent to the resistance value of the inductance is obtained by a poly resistor and the like. However, when the changing characteristics of the resistance value vary with a process, a temperature, and so on, the reference current cannot be correctly mirrored.
Thus in a conventional semiconductor integrated circuit, the drain voltages of two n-type MOS transistors composing a current mirror circuit are inputted to the differential input terminal of an operational amplifier, and the output voltage of the operational amplifier is applied to the gate of a MOS transistor serving as a variable resistor connected to the drain of the n-type MOS transistor serving as the destination of mirroring. With this configuration, the operational amplifier adjusts the drain voltages of the two n-type MOS transistors composing the current mirror circuit to the same voltage (e.g., see Japanese Patent Laid-Open No. 2006-254118).
According to the conventional semiconductor integrated circuit, the influence of the channel length modulation effect can be reduced and the minimum permissible voltage for an output voltage can be set lower.
However, when a resistive component such as a spiral inductor made up of a metal wire is present between a ground potential and the source of the n-type MOS transistor serving as the destination of mirroring, the conventional semiconductor integrated circuit cannot compensate for a voltage difference between the gates and sources.